L6228PDTR;L6228N;L6228DTR;L6228D;L6228PD;中文规格书,Datasheet资料

DMOS DRIVER FOR BIPOLAR STEPPER MOTOR

sssssssssssssOPERATING SUPPLY VOLTAGE FROM 8 TO 52V2.8A OUTPUT PEAK CURRENT (1.4A RMS)RDS(ON) 0.73Ω TYP. VALUE @ Tj = 25°COPERATING FREQUENCY UP TO 100KHzNON DISSIPATIVE OVERCURRENT PROTECTION

DUAL INDEPENDENT CONSTANT tOFF PWM CURRENT CONTROLLERS

FAST/SLOW DECAY MODE SELECTIONFAST DECAY QUASI-SYNCHRONOUS RECTIFICATION

DECODING LOGIC FOR STEPPER MOTOR FULL AND HALF STEP DRIVE

CROSS CONDUCTION PROTECTIONTHERMAL SHUTDOWN

UNDER VOLTAGE LOCKOUT

INTEGRATED FAST FREE WHEELING DIODESPowerDIP24 (20+2+2)PowerSO36SO24 (20+2+2)ORDERING NUMBERS:L6228N (PowerDIP24)L6228PD (PowerSO36)L6228D (SO24)TYPICAL APPLICATIONSsBIPOLAR STEPPER MOTOR

DESCRIPTIONThe L6228 is a DMOS Fully Integrated Stepper MotorDriver with non-dissipative Overcurrent Protection,realized in MultiPower-BCD technology, which com-BLOCK DIAGRAM

VBOOTVCPVBOOTbines isolated DMOS Power Transistors with CMOSand bipolar circuits on the same chip. The device in-cludes all the circuitry needed to drive a two-phasebipolar stepper motor including: a dual DMOS FullBridge, the constant off time PWM Current Controllerthat performs the chopping regulation and the PhaseSequence Generator, that generates the steppingsequence. Available in PowerDIP24 (20+2+2),PowerSO36 and SO24 (20+2+2) packages, theL6228 features a non-dissipative overcurrent protec-tion on the high side Power MOSFETs and thermalshutdown.VBOOTCHARGEPUMPOCDAOCDBOVERCURRENTDETECTION10VGATELOGICVBOOTVSAOUT1A10VOUT2ATHERMALPROTECTIONENCONTROLSENSEAPWMSTEPPINGSEQUENCEGENERATIONONE SHOTMONOSTABLEMASKINGTIME+-SENSECOMPARATORBRIDGE AOVERCURRENTDETECTIONGATELOGICBRIDGE BVREFARCAVSBHALF/FULLCLOCKRESETCW/CCWVOLTAGEREGULATOROUT1BOUT2BSENSEBVREFBRCB10V5VD01IN1225September 2003

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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L6228

ABSOLUTE MAXIMUM RATINGS

SymbolVSVOD

Parameter

Supply Voltage

Test conditions

VSA = VSB = VS

Value6060

UnitVV

Differential Voltage betweenVSA = VSB = VS = 60V;

VSA, OUT1A, OUT2A, SENSEA and VSENSEA = VSENSEB = GNDVSB, OUT1B, OUT2B, SENSEBBootstrap Peak Voltage

Input and Enable Voltage RangeVoltage Range at pins VREFA and VREFB

VSA = VSB = VS

VBOOTVIN,VENVREFA, VREFB

VS + 10 -0.3 to +7 -0.3 to +7-0.3 to +7 -1 to +43.55

VVVVVA

VRCA, VRCBVoltage Range at pins RCA and

RCBVSENSEA, VSENSEBIS(peak)

Voltage Range at pins SENSEA and SENSEB

Pulsed Supply Current (for each VSA = VSB = VS;VS pin), internally limited by the tPULSE < 1msovercurrent protectionRMS Supply Current (for each VS pin)

Storage and Operating Temperature Range

VSA = VSB = VS

ISTstg, TOP

1.4-40 to 150

A°C

RECOMMENDED OPERATING CONDITIONS

SymbolVSVOD

Parameter

Supply Voltage

Test Conditions

VSA = VSB = VS

MIN8

MAX5252

UnitVV

Differential Voltage BetweenVSA = VSB = VS;VSA, OUT1A, OUT2A, SENSEA and VSENSEA = VSENSEBVSB, OUT1B, OUT2B, SENSEBVoltage Range at pins VREFA and VREFB

Voltage Range at pins SENSEA (pulsed tW < trr)and SENSEB(DC)RMS Output Current

Operating Junction TemperatureSwitching Frequency

-25-0.1-6

-1

VREFA, VREFBVSENSEA, VSENSEBIOUTTjfsw

5611.4+125100

VVVA°CKHz

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L6228

THERMAL DATA

SymbolRth-j-pinsRth-j-caseRth-j-amb1Rth-j-amb1Rth-j-amb1Rth-j-amb2

(1)(2)(3)(4)

Description

Maximum Thermal Resistance Junction-PinsMaximum Thermal Resistance Junction-CaseMaximum Thermal Resistance Junction-Ambient (1)Maximum Thermal Resistance Junction-Ambient (2)Maximum Thermal Resistance Junction-Ambient (3)Maximum Thermal Resistance Junction-Ambient (4)

PowerDIP24

19-44--59

SO2415-55--78

PowerSO36

-2-361663

Unit°C/W°C/W°C/W°C/W°C/W°C/W

Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6cm2 (with a thickness of 35µm).Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35µm).

Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35µm), 16 via holesand a ground layer.

Mounted on a multi-layer FR4 PCB without any heat sinking surface on the board.

PIN CONNECTIONS (Top View)GND1234567101112131415161718D99IN1084363534333231302928272625242322212019GNDN.C.N.C.VSBOUT2BN.C.VBOOTENCONTROLHALF/FULLVREFBSENSEBRCBN.C.OUT1BN.C.N.C.GNDCLOCKCW/CCWSENSEARCAOUT1AGNDGNDOUT1BRCBSENSEBVREFBHALF/FULL1234567101112D99IN1083242322212019181716151413VREFARESETVCPOUT2AVSAGNDGNDVSBOUT2BVBOOTENCONTROLN.C.N.C.VSAOUT2AN.C.VCPRESETVREFACLOCKCW/CCWSENSEARCAN.C.OUT1AN.C.N.C.GNDPowerDIP24/SO24PowerSO36 (5)(5)The slug is internally connected to pins 1,18,19 and 36 (GND pins).

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L6228

PIN DESCRIPTION PACKAGE

SO24/PowerDIP24PIN #12

PowerSO36PIN #1011

CLOCKCW/CCW

Logic InputLogic Input

Step Clock input. The state machine makes one step on each rising edge.

Selects the direction of the rotation. HIGH logic level sets clockwise direction, whereas LOW logic level sets counterclockwise direction.

If not used, it has to be connected to GND or +5V.Bridge A Source Pin. This pin must be connected to Power Ground through a sensing power resistor.

RC Network Pin. A parallel RC network connected

between this pin and ground sets the Current Controller OFF-Time of the Bridge A.Bridge A Output 1.

Ground terminals. In PowerDIP24 and SO24 packages, these pins are also used for heat dissipation toward the PCB. On PowerSO36 package the slug is connected to these pins.Bridge B Output 1.

RC Network Pin. A parallel RC network connected

between this pin and ground sets the Current Controller OFF-Time of the Bridge B.

Bridge B Source Pin. This pin must be connected to Power Ground through a sensing power resistor.Bridge B Current Controller Reference Voltage. Do not leave this pin open or connected to GND.Step Mode Selector. HIGH logic level sets HALF STEP Mode, LOW logic level sets FULL STEP Mode. If not used, it has to be connected to GND or +5V.Decay Mode Selector. HIGH logic level sets SLOW

DECAY Mode. LOW logic level sets FAST DECAY Mode.If not used, it has to be connected to GND or +5V.Chip Enable. LOW logic level switches OFF all Power MOSFETs of both Bridge A and Bridge B. This pin is also connected to the collector of the Overcurrent and Thermal Protection to implement over current protection. If not used, it has to be connected to +5V through a resistor.

Bootstrap Voltage needed for driving the upper Power MOSFETs of both Bridge A and Bridge B.Bridge B Output 2.

Bridge B Power Supply Voltage. It must be connected to the Supply Voltage together with pin VSA

Bridge A Power Supply Voltage. It must be connected to the Supply Voltage together with pin VSB

Name

Type

Function

34

1213

SENSEARCA

Power SupplyRC Pin

56, 7,18, 19

151, 18,19, 36

OUT1AGND

Power Output

GND

2224

OUT1BRCB

Power OutputRC Pin

101112

252627

SENSEBVREFBHALF/FULL

Power SupplyAnalog InputLogic Input

1328CONTROLLogic Input

1429EN

Logic Input (6)

15161720

3032334

VBOOTOUT2BVSBVSA

Supply VoltagePower OutputPower SupplyPower Supply

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L6228

PIN DESCRIPTION (continued)PACKAGE

SO24/PowerDIP24PIN #212223

PowerSO36PIN #578

OUT2AVCPRESET

Power Output

OutputLogic Input

Bridge A Output 2.

Charge Pump Oscillator Output.

Reset Pin. LOW logic level restores the Home State (State 1) on the Phase Sequence Generator State Machine.

If not used, it has to be connected to +5V.Bridge A Current Controller Reference Voltage. Do not leave this pin open or connected to GND.

Name

Type

Function

249VREFAAnalog Input

(6)

Also connected at the output drain of the Over current and Thermal protection MOSFET. Therefore, it has to be driven putting in seriesa resistor with a value in the range of 2.2KΩ - 180KΩ, recommended 100KΩ.

ELECTRICAL CHARACTERISTICS

(Tamb = 25°C, Vs = 48V, unless otherwise specified)

Symbol

Parameter Test Conditions

Min5.85

All Bridges OFF;

Tj = -25°C to 125°C (7)

Typ6.35.55

Max Unit6.8610

VVmA

VSth(ON)Turn-on ThresholdVSth(OFF)Turn-off Threshold

ISTj(OFF)

Quiescent Supply Current

Thermal Shutdown Temperature165°C

Output DMOS TransistorsRDS(ON)

High-Side + Low-Side Switch ON Tj = 25 °C

Resistance

Tj =125 °C (7)Leakage Current

EN = Low; OUT = VSEN = Low; OUT = GND

Source Drain DiodesVSDtrrtfr

Forward ON VoltageReverse Recovery TimeForward Recovery Time

ISD = 1.4A, EN = LOWIf = 1.4A

1.15300200

1.3

Vnsns

-0.3

1.472.35

1.692.702

ΩΩmAmA

IDSS

Logic Inputs (EN, CONTROL, HALF/FULL, CLOCK, RESET, CW/CCW)VILVIHIILIIH

Low level logic input voltageHigh level logic input voltageLow Level Logic Input CurrentHigh Level Logic Input Current

GND Logic Input Voltage7V Logic Input Voltage

-0.32-10

100.87

VVµAµA

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L6228

ELECTRICAL CHARACTERISTICS (continued)(Tamb = 25°C, Vs = 48V, unless otherwise specified)

SymbolVth(ON)Vth(OFF)Vth(HYS)

Parameter Test Conditions

Turn-on Input ThresholdTurn-off Input ThresholdInput Threshold Hysteresis

0.80.25Min

Typ1.81.30.5

Max Unit2.0

VVV

Switching Characteristics

tD(ON)EN Enable to Output Turn-on Delay Time (8)tD(OFF)ENEnable to Output Turn-off Delay

Time (8)tRISEtFALLtDCLK

Output Rise Time (8)Output Fall Time (8)

Clock to Output Delay Time (9)

ILOAD =1.4A, Resistive LoadILOAD =1.4A, Resistive LoadILOAD =1.4A, Resistive LoadILOAD =1.4A, Resistive LoadILOAD =1.4A, Resistive Load

5005004040

2

111001111

0.5

Tj = -25°C to 125°C (7)

10.6

1

650800

8001000250250

nsnsnsnsµsµsµsKHzµsµsµsµsµsMHz

tCLK(min)LMinimum Clock Time (10)tCLK(min)Minimum Clock Time (10)

H

fCLKtS(MIN)tH(MIN)tR(MIN)

Clock Frequency

Minimum Set-up Time (11)Minimum Hold Time (11)Minimum Reset Time (11)

tRCLK(MINMinimum Reset to Clock Delay

)Time (11)

tDTfCP

Dead Time ProtectionCharge Pump Frequency

PWM Comparator and MonostableIRCA, IRCBSource Current at pins RCA and

RCBVoffsettPROPtBLANKtON(MIN)tOFF

Offset Voltage on Sense Comparator

Turn OFF Propagation Delay (12)Internal Blanking Time on SENSE pinsMinimum On TimePWM Recirculation Time

ROFF = 20KΩ; COFF = 1nFROFF = 100KΩ; COFF = 1nFVRCA = VRCB = 2.5VVREFA, VREFB = 0.5V

3.5

5.5±550012.513613

mAmVnsµsµsµsµs

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L6228

ELECTRICAL CHARACTERISTICS (continued)(Tamb = 25°C, Vs = 48V, unless otherwise specified)

SymbolIBIAS

Parameter Test Conditions

Input Bias Current at pins VREFA

and VREFB

Min

Typ

Max Unit10

µA

Over Current ProtectionISOVERROPDRInput Supply Overcurrent Protection ThresholdOpen Drain ON ResistanceTj = -25°C to 125°C (7)I = 4mAI = 4mA; CEN < 100pFI = 4mA; CEN < 100pF22.8402001003.5560AΩnsnstOCD(ON)OCD Turn-on Delay Time (13)tOCD(OFF)OCD Turn-off Delay Time (13)(7)Tested at 25°C in a restricted range and guaranteed by characterization.(8)See Fig. 1.(9)See Fig. 2.(10)See Fig. 3.(11) See Fig. 4.

(12)Measured applying a voltage of 1V to pin SENSE and a voltage drop from 2V to 0V to pin VREF.(13)See Fig. 5.

Figure 1. Switching Characteristic DefinitionENVth(ON)Vth(OFF)tIOUT90%10%D01IN1316ttFALLtD(OFF)ENtD(ON)ENtRISE7/26

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L6228

Figure 2. Clock to Output Delay TimeCLOCKVth(ON)tIOUTD01IN1317ttDCLKFigure 3. Minimum Timing Definition; Clock InputCLOCKVth(OFF)Vth(ON)tCLK(MIN)LVth(OFF)tCLK(MIN)HD01IN1318Figure 4. Minimum Timing Definition; Logic InputsCLOCKVth(ON)LOGIC INPUTStS(MIN)RESETVth(OFF)Vth(ON)tH(MIN)tR(MIN)tRCLK(MIN)D01IN13198/26

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L6228

Figure 5. Overcurrent Detection Timing DefinitionIOUTISOVERONBRIDGEOFFVEN90%10%tOCD(ON)tOCD(OFF)D02IN13999/26

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L6228

CIRCUIT DESCRIPTIONPOWER STAGES and CHARGE PUMPThe L6228 integrates two independent Power MOSFull Bridges. Each Power MOS has an RDS(ON) =0.73Ω (typical value @ 25°C), with intrinsic fast free-wheeling diode. Switching patterns are generated bythe PWM Current Controller and the Phase Se-quence Generator (see below). Cross conductionprotection is achieved using a dead time (tDT = 1µstypical value) between the switch off and switch on oftwo Power MOSFETSs in one leg of a bridge.Pins VSA and VSB MUST be connected together tothe supply voltage VS. The device operates with asupply voltage in the range from 8V to 52V. It has tobe noticed that the RDS(ON) increases of some per-cents when the supply voltage is in the range from 8Vto 12V.Using N-Channel Power MOS for the upper transis-tors in the bridge requires a gate drive voltage abovethe power supply voltage. The bootstrapped supplyvoltage VBOOT is obtained through an internal Oscil-lator and few external components to realize acharge pump circuit as shown in Figure 6. The oscil-lator output (VCP) is a square wave at 600KHz (typi-cal) with 10V amplitude. Recommended values/partnumbers for the charge pump circuit are shown in Ta-ble 1.Table 1. Charge Pump External Components

Values

CBOOTCPRPD1D2

220nF10nF100Ω1N41481N4148

OPENCOLLECTOROUTPUTLOGIC INPUTSPins CONTROL, HALF/FULL, CLOCK, RESET andCW/CCW are TTL/CMOS and uC compatible logicinputs. The internal structure is shown in Fig. 7. Typ-ical value for turn-on and turn-off thresholds are re-spectively Vth(ON)= 1.8V and Vth(OFF)= 1.3V.Pin EN (Enable) has identical input structure with theexception that the drain of the Overcurrent and ther-mal protection MOSFET is also connected to this pin.Due to this connection some care needs to be takenin driving this pin. The EN input may be driven in oneof two configurations as shown in Fig. 8 or 9. If drivenby an open drain (collector) structure, a pull-up resis-tor REN and a capacitor CEN are connected as shownin Fig. 8. If the driver is a standard Push-Pull structurethe resistor REN and the capacitor CEN are connectedas shown in Fig. 9. The resistor REN should be cho-sen in the range from 2.2KΩ to 180KΩ. Recommend-ed values for REN and CEN are respectively 100KΩand 5.6nF. More information on selecting the valuesis found in the Overcurrent Protection section.Figure 7. Logic Inputs Internal Structure5VESDPROTECTIOND01IN1329Figure 8. EN Pin Open Collector Driving5VRENENCEN5VFigure 6. Charge Pump CircuitVSD1D2RPCPVCPVBOOTVSAVSBD01IN1328ESDPROTECTIOND01IN1330CBOOTFigure 9. EN Pin Push-Pull Driving 5VRENENCENPUSH-PULLOUTPUTESDPROTECTIOND01IN133110/26

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