AD8563

In-Amp with Shutdown

Preliminary Technical Data

FEATURES

Low offset voltage: 25 μV max

Low input offset drift: 0.1 μV/°C max High CMR: 120 dB min @ G = 100

Low noise: 0.7 μV p-p from 0.01 Hz to 10 Hz Wide gain range: 1 to 10,000

Single-supply operation: +2.7 V to +5.5 V Rail-to-rail output Shutdown capability

−40°C to +125°C operation

APPLICATIONS

Strain gauge Weigh scales Pressure sensors

Laser diode control loops Portable medical instruments Thermocouple amplifiers

GENERAL DESCRIPTION

The AD85631 is a precision instrumentation amplifier featuring low noise, rail-to-rail output and a power-saving shutdown mode. The AD8563 also features low offset voltage and drift coupled with high common-mode rejection. In shutdown mode, the total supply current is reduced to less than 4 μA. The AD8563 is capable of operating from 2.7 V to 5.5 V. With a low offset voltage of 30 μV, an offset voltage drift of 0.5 μV/°C, and a voltage noise of only 1 μV p-p (0.01 Hz to

10 Hz), the AD8563 is ideal for applications where error sources cannot be tolerated. Precision instrumentation, position and pressure sensors, medical instrumentation, and strain gauge amplifiers benefit from the low noise, low input bias current, and high common-mode rejection. The small footprint and low cost are ideal for high volume applications.

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

AD8563

PIN CONFIGURATION

RGA110 RGBVINP2AD8563 9 VINNVCC3TO P VIEW 8 GNDVO4(Not to Scale) 7 V R

EFVFB56 ENABLE

Figure 1. 10-Lead MSOP

The small package and low power consumption allow maximum channel density and minimum board size for space-critical equipment and portable systems.

The AD8563 is specified over the industrial temperature range from −40°C to +125°C. The AD8563 is available in a Pb-free, 10-lead MSOP.

1

Patent pending.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2006 Analog Devices, Inc. All rights reserved.

AD8563

Preliminary Technical Data

Gain Selection (Gain-Setting Resistors).....................................7 Reference Connection..................................................................7 Disable Function...........................................................................7 Output Filtering.............................................................................7 Clock Feedthrough........................................................................7 Low Impedance Output................................................................7 Maximizing Performance Through Proper Layout..................8 Power Supply Bypassing...............................................................8 Input Overvoltage Protection......................................................8 Capacitive Load Drive..................................................................8 Circuit Diagrams/Connections...................................................9 Outline Dimensions.......................................................................13 Ordering Guide...............................................................................13

TABLE OF CONTENTS

Features..............................................................................................1 Applications.......................................................................................1 Pin Configuration.............................................................................1 General Description.........................................................................1 Revision History...............................................................................2 Specifications.....................................................................................3 Electrical Characteristics.............................................................3 Absolute Maximum Ratings............................................................5 Thermal Resistance......................................................................5 ESD Caution..................................................................................5 Typical Performance Characteristics........Error! Bookmark not defined.

Theory of Operation........................................................................6 High PSR and CMR.....................................................................6 1/f Noise Correction....................................................................6 Applications.......................................................................................7

REVISION HISTORY

06/06—Revision PrA: Initial Version

Rev. PrA | Page 2 of 15

Preliminary Technical Data

AD8563

SPECIFICATIONS M

ELECTRICAL CHARACTERISTICS

VCC = 5.0 V, VCM = 2.5 V, VREF = VCC/2, VIN = VINP − VINN, RLOAD = 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting resistor values. Temperature specifications guaranteed by characterization. Table 1.

Parameter Symbol Conditions INPUT CHARACTERISTICS Input Offset Voltage VOS G = 1000 G = 100 G = 10 G = 1 vs. Temperature ΔVOS/ G = 1000, −40°C ≤ TA ≤ +125°C

ΔT

G = 100, −40°C ≤ TA ≤ +125°C G = 10, −40°C ≤ TA ≤ +125°C

M G = 1, −40°C ≤ TA ≤ +125°C Input Bias Current IB −40°C ≤ TA ≤ +125°C Input Offset Current IOS VREF Pin Current IREF Input Operating Impedance Differential Common ode Input Voltage Range Common-Mode Rejection CMR G = 100, VCM = 0 V to 2.85 V G = 100, VCM = 0 V to 2.85 V, −40°C ≤ TA ≤ +125°C G = 10, VCM = 0 V to 2.85 V, −40°C ≤ TA ≤ +125°C Gain Error G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V G = 10, VCM = 121.25 mV , VO = 0.075 V to 4.925 V Gain Drift G = 1, 10, 100, 1000, −40°C ≤ TA ≤ +125°C Nonlinearity G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V G = 10, VCM = 121.25 mV, VO = 0.075 V to 4.925 V VREF Range OUTPUT CHARACTERISITICS Output Voltage High VOH Output Voltage Low VOL Short-Circuit Current ISC POWER SUPPLY Power Supply Rejection PSR G = 100, VS = 2.7 V to 5.5 V, VCM = 0 V G = 10, VS = 2.7 V to 5.5 V, VCM = 0 V Supply Current ISY IO = 0 mA, VIN = 0 V

−40°C ≤ TA ≤ +125°C Supply Current Shutdown Mode ISD ENABLE INPUTS Logic High Voltage Logic Low Voltage NOISE PERFORANCE Voltage Noise en p-p f = 0.01 Hz to 10 Hz Voltage Noise Density en G = 100, f = 1 kHz G = 10, f = 1 kHz Internal Clock Frequency

1

Signal Bandwidth G = 1 to 1000

1

Min Typ Max Unit

25 μV 25 μV 50 μV 350 μV 0.01 0.1 μV/°C 0.01 0.1 μV/°C 0.1 0.3 μV/°C 0.7 3 MμV/°C

M 0.3 1 nA 2 nA 2 nA 0.02 1 nA 75||2 Ω||pF 100||2 Ω||pF 0 3.0 V 120 140 dB 105 140 100 120 dB 0.25 % 0.5 % 50 ppm/°C 0.006 % FS 0.035 % FS 0.9 4.1 V 4.925 V 0.075 V ±35 mA 100 120 dB 90 106 dB 1.1 1.3 mA 1.5 mA 2 4 μA 2.40 V 0.80 V

0.7 μV p-p 35 nV/√Hz 150 nV/√Hz 40 kHz 1 kHz

Higher bandwidths result in higher noise.

Rev. PrA | Page 3 of 15

AD8563

Preliminary Technical Data

VS = 2.7 V, VCM = -0 V, VREF = VS/2, VIN = VINP − VINN, RLOAD = 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting resistor values. Temperature specifications guaranteed by characterization. Table 2.

Parameter Symbol Conditions INPUT CHARACTERISTICS Input Offset Voltage VOS G = 1000 G = 100 G = 10 G = 1 Vs. Temperature ΔVOS/ G = 1000, −40°C ≤ TA ≤ +125°C

ΔT

G = 100, −40°C ≤ TA ≤ +125°C G = 10, −40°C ≤ TA ≤ +125°C G = 1, −40°C ≤ TA ≤ +125°C Input Bias Current IB −40°C ≤ TA ≤ +125°C Input Offset Current IOS VREF Pin Current IREF Input Operating Impedance

Differential Common Mode Input Voltage Range Common-Mode Rejection CMR G = 100, VCM = 0 V to 0.7 V G = 100, VCM = 0 V to 0.7 V, −40°C ≤ TA ≤ +125°C G = 10, VCM = 0 V to 0.7 V Gain Error G = 100, VCM =4.125 mV, VO = 0.075 V to 2.625 V G = 10, VCM = 41.25 mV, VO = 0.075 V to 2.625 V Gain Drift G = 1, 10, 100, 1000, −40°C ≤ TA ≤ +125°C Nonlinearity G = 100, VCM = 4.125 mV, VO = 0.075 V to 2.625 V G = 10, VCM = 41.25 mV, VO = 0.075 V to 2.625 V VREF Range OUTPUT CHARACTERISITICS Output Voltage High VOH Output Voltage Low VOL Short-Circuit Current ISC POWER SUPPLY Power Supply Rejection PSR G = 100, VS = 2.7 V to 5.5 V, VCM = 0 V Supply Current ISY IO = 0 mA, VIN = 0 V

−40°C ≤ TA ≤ +125°C Supply Current Shutdown Mode ISD ENABLE INPUTS Logic High Voltage Logic Low Voltage NOISE PERFORMANCE Voltage Noise en p-p f = 0.01 Hz to 10 Hz Voltage Noise Density en G = 100, f = 1 kHz G = 10, f = 1 kHz Internal Clock Frequency

1

Signal Bandwidth G = 1 to 1000

1Higher bandwidths result in higher noise.

Min Typ Max Unit 30 μV 30 μV 60 μV 500 μV 0.1 0.5 μV/°C

0.1 0.5 μV/°C 3 μV/°C 10 μV/°C 0.3 1 nA 2 nA 2 nA 0.02 1 nA 75||2 Ω||pF M 100||2 MΩ||pF 0 0.7 V 100 110 dB 86 86 95 dB 0.2 0.35 % 0.2 0.5 % 50 ppm/°C 0.015 % FS 0.015 % FS 0.9 1.8 V 2.625 V 0.075 V ±5 mA 100 120 dB 0.9 1.2 mA 1.4 mA 2 4 μA 1.4 V 0.5 V 1 μV p-p 45 nV/√Hz 180 nV/√Hz 40 kHz 1 kHz

Rev. PrA | Page 4 of 15

Preliminary Technical Data

AD8563

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Ratings may cause permanent damage to the device. This is a stress Supply Voltage 6 V rating only; functional operation of the device at these or any Input Voltage +VSUPPLY other conditions above those indicated in the operational

1

Differential Input Voltage ±VSUPPLY section of this specification is not implied. Exposure to absolute Output Short-Circuit Duration to GND Indefinite maximum rating conditions for extended periods may affect Storage Temperature Range (RM Package) −65°C to +150°C device reliability. Operating Temperature Range −40°C to +125°C

THERMAL RESISTANCE Junction Temperature Range (RM Package) −65°C to +150°C

Lead Temperature Range (Soldering, 10 sec) 300°C θ JA is specified for the worst-case conditions, that is, a device

1

Stresses above those listed under Absolute Maximum Ratings

Differential input voltage is limited to ±5.0 V, the supply voltage, or whichever is less.

soldered in a circuit board for surface-mount packages. Table 4.

Package Type 10-Lead MSOP (RM)

1

θJA1 110

θJC Unit 32.2

°C/W

θJA is specified for the nominal conditions, that is, θJA is specified for the device soldered on a circuit board.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. PrA | Page 5 of 15

AD8563

Preliminary Technical Data

HIGH PSR AND CMR

Common-mode rejection and power supply rejection indicate the amount that the offset voltage of an amplifier changes when its common-mode input voltage or power supply voltage changes. The auto-correction architecture of the AD8563 continuously corrects for offset errors, including those induced by changes in input or supply voltage, resulting in exceptional rejection performance. The continuous auto-correction provides great CMR and PSR performances over the entire operating temperature range (−40°C to +125°C).

The parasitic resistance in series with R2 does not degrade

CMR but causes a small gain error and a very small offset error. Therefore, an external buffer amplifier is not required to drive the VREF pin to maintain excellent CMR performance. This helps reduce system costs over conventional instrumentation amplifiers.

THEORY OF OPERATION

The AD8563 is a precision current-mode correction

instrumentation amplifier capable of single-supply operation. The current-mode correction topology results in excellent accuracy, without the need for trimmed resistors on the die. Figure 2 shows a simplified diagram illustrating the basic operation of the AD8563 (without correction). The circuit consists of a voltage-to-current amplifier (M1 to M6), followed by a current-to-voltage amplifier (R2 and A1). Application of a differential input voltage forces a current through External Resistor R1, resulting in conversion of the input voltage to a signal current. Transistor M3 to Transistor M6 transfer twice this signal current to the inverting input of the op amp A1. Amplifier A1 and External Resistor R2 form a current-to-voltage converter to produce a rail-to-rail output voltage at VOUT.

Op amp A1 is a high precision, auto-zero amplifier. This amplifier preserves the performance of the autocorrecting, current-mode amplifier topology while offering the user a true voltage-in, voltage-out instrumentation amplifier. Offset errors are corrected internally.

An external reference voltage is applied to the non-inverting input of A1 to set the output reference level. External Capacitor C2 filters out correction noise.

The pin out of the AD8563 allows the user to access the signal current from the output of the voltage-to-current converter (Pin 5). The user can choose to use the AD8563 as a current-output device instead of a voltage-output device. See Figure 7 for circuit connections.

1/f NOISE CORRECTION

Flicker noise, also known as 1/f noise, is noise inherent in the physics of semiconductor devices and decreases 10 dB per decade. The 1/f corner frequency of an amplifier is the frequency at which the flicker noise is equal to the broadband noise of the amplifier. At lower frequencies, flicker noise dominates causing large errors in low frequency or dc applications.

Flicker noise is effectively visible as a slowly varying offset error, which the auto-correction topology of the AD8563 reduces. This allows the AD8563 to have lower noise near dc than standard low noise instrumentation amplifiers.

Rev. PrA | Page 6 of 15

Preliminary Technical Data

AD8563

DISABLE FUNCTION

APPLICATIONS

GAIN SELECTION (GAIN-SETTING RESISTORS)

The gain of the AD8563 is set according to

The AD8563 provides a shutdown function to conserve power when the device is not needed. Although there is a 1 μA pull-up G = 2 × (R2/R1) (1)

current on the ENABLE pin, Pin 6 should be connected to the

Table 5 lists the recommended resistor values. Resistor R1 must positive supply for normal operation and to the negative supply be at least 3.92 kΩ for proper operation. The use of resistors to turn the device off. It is not recommended to leave Pin 6 larger than the recommended values results in higher offset and floating. higher noise.

Turn-on time upon switching Pin 6 high is dominated by the

Gain accuracy depends on the matching of R1 and R2. Any output filters. When the device is disabled, the output becomes mismatch in resistor values results in a gain error. Resistor high impedance, enabling a multiplexing application of multiple value errors due to drift will affect gain by the amount indicated AD8563 instrumentation amplifiers. by Equation 1. However, due to the current-mode operation of

OUTPUT FILTERING the AD8563, a mismatch in R1 and R2 does not degrade the

Filter Capacitor C2 is required to limit the amount of switching CMR.

noise present at the output. The recommended bandwidth of

Take care when selecting and positioning the gain setting the filter created by C2 and R2 is 1.4 kHz. The user should first resistors. The resistors should be made of the same material and select R1 and R2 based on the desired gain, then select C2 based on package style. Surface-mount resistors are recommended. They

C2 = 1/(1400 × 2 × π × R2) (2) should be positioned as close together

as possible to minimize TC errors. Addition of another single-pole RC filter of 1.4 kHz on the To maintain good CMR vs. frequency, the parasitic capacitance on the R1 gain setting pins should be minimized and matched. This also helps maintain a low gain error at G < 10. If resistor trimming is required to set a precise gain, trim Resistor R2 only. Using a potentiometer for R1 degrades the amplifier’s performance.

output (R3 and C3 in Figure 3 to Figure 5) is required for bandwidths greater than 10 Hz. These two filters produce an overall bandwidth of 1 kHz.

When driving an ADC, the recommended values for the second filter are R3 = 100 Ω and C3 = 1 μF. This filter is required to achieve the specified performance. It also acts as an anti-aliasing filter for the ADC. If a sampling ADC is not being driven, the value of the capacitor can be reduced, but the filter frequency should remain unchanged.

For applications with low bandwidths (<10 Hz), only the first filter is required. In this case, the high frequency noise from the auto-zero amplifier (output amplifier) is not filtered before the following stage.

REFERENCE CONNECTION

Unlike traditional three op amp instrumentation amplifiers, parasitic resistance in series with VREF (Pin 7) does not degrade CMR performance. This allows the AD8563 to attain its extremely high CMR performance without the use of an external buffer amplifier to drive the VREF pin, which is required by industry-standard instrumentation amplifiers. This helps save valuable printed circuit board space and minimizes system costs. For optimal performance in single-supply applications, VREF should be set with a low noise precision voltage reference. However, for a lower system cost, the reference voltage can be set with a simple resistor voltage divider between the supply and ground (see Figure 3). This configuration results in degraded output offset performance if the resistors deviate from their ideal values. In dual-supply applications, VREF can be connected to ground.

The VREF pin current is approximately 20 pA, and as a result, an external buffer is not required.

CLOCK FEEDTHROUGH

The AD8563 uses two synchronized clocks to perform the auto-correction. The input voltage-to-current amplifiers are corrected at 60 kHz.

Trace amounts of these clock frequencies can be observed at the output. The amount of feedthrough is dependent upon the gain, because the auto-correction noise has an input and output referred term. The correction feedthrough is also dependent upon the values of the external filters R2/C2, and R3/C3.

LOW IMPEDANCE OUTPUT

For applications where a low output impedance is required, the circuit in Figure 5 should be used. This provides the same filtering performance as shown in the configuration in Figure 6.

Rev. PrA | Page 7 of 15

AD8563

Preliminary Technical Data

For single-supply operation, a 0.1 μF surface-mount capacitor should be connected from the supply line to ground. All bypass capacitors should be positioned as close to the DUT supply pins as possible, especially the bypass capacitor between the supplies. Placement of the bypass capacitor on the back of the board directly under the DUT is preferred.

MAXIMIZING PERFORMANCE THROUGH PROPER LAYOUT

To achieve the maximum performance of the AD8563, care should be taken in the circuit board layout. The PC board

surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board reduces surface moisture and provides a humidity barrier, reducing parasitic resistance on the board.

Care must be taken to minimize parasitic capacitance on Pin 1 and Pin 10 (Resistor R1 connections). Traces from Pin 1 and Pin 10 to R1 should be kept short and symmetric. Excessive capacitance on these pins will result in a gain error. This effect is most prominent at low gains (G < 10).

For high impedance sources, the PC board traces from the AD8563 inputs should be kept to a minimum to reduce input bias current errors.

INPUT OVERVOLTAGE PROTECTION

All terminals of the AD8563 are protected against ESD. In the case of a dc overload voltage beyond either supply, a large

current would flow directly through the ESD protection diodes. If such a condition should occur, an external resistor should be used in series with the inputs to limit current for voltages

beyond the supply rails. The AD8563 can safely handle 5 mA of continuous current, resulting in an external resistor selection of REXT = (VIN − VS)/5 mA.

POWER SUPPLY BYPASSING

The AD8563 uses internally generated clock signals to perform the auto-correction. As a result, proper bypassing is necessary to achieve optimum performance. Inadequate or improper bypassing of the supply lines can lead to excessive noise and offset voltage.

A 0.1 μF surface-mount capacitor should be connected between the supply lines. This capacitor is necessary to minimize ripple from the correction clocks inside the IC. For dual-supply operation (see Figure 5), a 0.1 μF (ceramic) surface-mount

capacitor should be connected from each supply pin to ground.

VCCCAPACITIVE LOAD DRIVE

The output buffer, Pin 4, can drive capacitive loads up to 100 pF.

C2IR1I – IR1(VINP – VINN)R1M2VINNM3M4IM5M6I – IR1I + IR1VBIASVREFA12IR1VOUT = VREFR2+2R2R2VINP – VINNIR1 =VINPM12I2I05474-030EXTERNAL

Figure 2. Simplified AD8563 Schematic

Rev. PrA | Page 8 of 15

Preliminary Technical Data

AD8563

CIRCUIT DIAGRAMS/CONNECTIONS

VS+0.1µFGND236VIN++1R110VIN––78AD8553AD85635R2C2GND100kΩVS+100kΩ0.1µF4R3100ΩC31µFGNDVOUT9R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTERGND05474-032

Figure 3. Single-Supply Connection Diagram Using Voltage Divider Reference

VS+0.1µFGNDVS–0.1µFVIN+2+361R110VIN––78AD8563AD85535R2C20.1µFGNDVS–4R3100ΩC31µFGNDVOUT9R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTER05474-031

Figure 4. Dual-Supply Connection Diagram

Rev. PrA | Page 9 of 15

AD8563

Preliminary Technical Data

VS+

0.1µFGNDVS–0.1µFVIN+2+361R110VIN––78GND0.1µFGNDVS–AD8553AD856354R3100ΩC31µFR2GNDVOUTC2905474-034R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTER

Figure 5. Dual-Supply Connection Diagram with Low Impedance Output

VS+0.1µFGND236VIN++1R110VIN––78AD8553AD85635R2C2VS–4R3100ΩC31µFGNDVOUT9R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTER1.0µFVCC0.1µFVINGND05474-035VOUTFigure 6. Dual-Supply Connection Diagram Using IC Voltage Reference

Rev. PrA | Page 10 of 15

Preliminary Technical Data

AD8563

VS+213674R1109_NC(NOCONNECT)VIO=INR1AMMETER05474-037

VIN+AD8553AD8563580.1µFVS–10kΩA

Figure 7. Voltage-to-Current Converter, 0 μA to 30 μA Source

VS+2+1374R1109_6VREF = 2.5V100ΩC25805474-038AD8553AD8563A/DA/DCONVERTER1µFR2

Figure 8. Example of an AD8563 Driving a Converter at VS+ = 5 V

Rev. PrA | Page 11 of 15

AD8563

Preliminary Technical Data

VS+LOGIC2+1374R1109_6VREFR3C258VS–VS+2+137R6109_6VREF4C358R7R8100Ω1µFVOUTR2100ΩAD8553AD8563AD8563AD8553VS+2+1374R11109_6VREFR13C458R12100Ω05474-039AD8553AD8563

Figure 9. Multiplexed Output

Table 5. Recommended External Component Values for Selected Gains

Desired Gain (V/V)

1 2 5 10 50 100 500 1000

R1 (Ω) 200 k 100 k 40.2 k 20 k 4.02 k 3.92 k 3.92 k 3.92 k

R2 || C2 (Ω || F) 100 k || 1200p 100 k || 1200p 100 k || 1200p 100 k || 1200p 100 k || 1200p 196 k || 560p 976 k || 120p 1.96 M || 56p

Calculated Gain 1 2 4.975 10 49.75 100 497.95 1000

Rev. PrA | Page 12 of 15

Preliminary Technical Data

AD8563

OUTLINE DIMENSIONS

3.103.002.903.103.002.90PIN 10.50 BSC0.950.850.750.150.050.330.17COPLANARITY0.10COMPLIANT TO JEDEC STANDARDS MO-187-BA1.10 MAX8°0°0.800.600.4010615.154.904.655SEATINGPLANE0.230.08

Figure 10. 10-Lead Mini Small Outline Package [MSOP]

(RM-10)

Dimensions shown in millimeters

ORDERING GUIDE

Model

AD8563ARMZ-R21 AD8563ARMZ-REEL1

1

Temperature Range −40°C to +125°C −40°C to +125°C Package Description 10-Lead MSOP 10-Lead MSOP Package Option RM-10 RM-10 Branding A09 A09

Z = Pb-free part.

Rev. PrA | Page 13 of 15

AD8563

Preliminary Technical Data

NOTES

Rev. PrA | Page 14 of 15

Preliminary Technical Data

NOTES

©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06202-0-6/06(PrA)

Rev. PrA | Page 15 of 15

AD8563