专利名称：Microcomputer logic development device发明人：Shougo Imada,Kouichi Kanou,Takashi Higuchi申请号：US10884636申请日：20040702
公开号：US20050039149A1公开日：20050217
专利附图：
摘要：A microcomputer logic development device realizing high speed sampling RAMmonitoring by connecting an existing RAM measurement device, provided with a firstblock providing functions corresponding to a microcomputer core, a second block havingfunctions corresponding to microcomputer resources, a bus connecting the first and
second blocks, and a RAM measurement block provided with a common memory,connected with the bus and RAM measurement device, and realizing a RAM monitorfunction with respect to the first block, the RAM measurement block realizing a highspeed RAM monitoring operation by dividing the timing for processing between the firstblock and common memory and the timing for processing between the common memoryand RAM measurement device.
申请人：Shougo Imada,Kouichi Kanou,Takashi Higuchi
地址：Kobe-shi JP,Kobe-shi JP,Kobe-shi JP
国籍：JP,JP,JP
更多信息请下载全文后查看
因篇幅问题不能全部显示，请点此查看更多更全内容